As a wearable device, there is a portable terminal device which is mounted on a wrist such as a smart watch. Such a portable terminal device is driven by power supplied from a battery, and is required to work for a long time. In order to achieve a function of the terminal and a function of the wrist watch, the portable terminal device is mounted with a semiconductor integrated circuit device (hereinafter, simply referred to as a semiconductor device) in which a microprocessor (hereinafter, referred to as a central processing unit (CPU)), a memory, and the like are built.
In order to make the portable terminal device work for a long time, it is considered that the portable terminal device is mounted with a semiconductor device in which a low-speed CPU operated at a low speed is built and a semiconductor device in which a high speed CPU operated at a high speed is built. In this case, for example, the function as the wrist watch is realized by the low-speed CPU (a sub CPU), and the function as the terminal is realized by the high-speed CPU (a main CPU). Since the low-speed CPU is operated at a low speed, the power consumption is low, so that it is possible to extend the operation time of the portable terminal device.
As a technique of reducing the power consumption in the semiconductor device, there is known a dynamic voltage and frequency scaling (DVFS). With the DVFS technique, it is possible to reduce the power consumption in the semiconductor device by lowering a power source voltage of the semiconductor device and by lowering a frequency for operating the semiconductor device. Since the power consumption in the semiconductor device can be reduced, the operation time of the portable terminal device can be extended.
For example, as a technique of reducing the power consumption in the semiconductor device, Japanese Patent Application Laid-Open Publication No. 2004-282776 (Patent Document 1) discloses a technique in which a substrate bias voltage is applied to a substrate of the semiconductor device, and the frequency for operating the semiconductor device is changed.
As a memory built in the semiconductor device, there is a static random access memory (hereinafter, referred to as an SRAM). Japanese Patent Application Laid-Open Publication No. 2003-132683 (Patent Document 2) discloses a technique of reducing the power consumption of the SRAM, for example.